1. Field of the Invention
The present invention relates to semiconductor packages and fabrication methods thereof, and more particularly, to a semiconductor package having an LED chip attached to a substrate and a fabrication method thereof.
2. Description of Related Art
Along with the rapid development of electronic industries, electronic products are becoming lighter, thinner, shorter and smaller and developed towards high performance, high functionality and high speed. Therein, LEDs (Light Emitting Diodes) have been widely applied in electronic products having lighting requirements since the LEDs have advantages of long lifetime, small size, high shock resistance and low power consumption.
A flip-chip type LED chip is usually mounted on a carrier through eutectic bonding or direct bonding, which is referred to as a die attachment process. Au—Sn eutectic bonding is generally used in a die attachment process. Therein, an Au—Sn alloy is formed on a bottom surface of an LED chip as a solder material. Then, the LED chip is mounted on a substrate plated with Au or Ag. Thereafter, the substrate with the chip is heated to an eutectic temperature so as for Au or Ag on the substrate and the Au—Sn alloy to diffuse mutually into each other, thereby changing the composition of the alloy. Next, the eutectic structure is solidified such that the die attachment process is completed. In this manner, the eutectic structure between the LED chip and the substrate has a thickness of about 3 to 5 um, as shown in FIG. 1.
FIG. 1 is a cross-sectional view of a conventional semiconductor package 1. Referring to FIG. 1, an LED chip 13 is mounted on a substrate 10. The substrate 10 has a base layer 101, an insulating layer 102 formed on the base layer 101 and a metal layer 103 formed on the insulating layer 102. The metal layer 103 has a plurality of circuits (not shown), reflective portions 103c, a first conductive pad 103a and a second conductive pad 103b. Further, a first surface treatment layer 11a is formed on the reflective portions 103c, and a second surface treatment layer 11b is formed on the circuits and the first and second conductive pads 103a, 103b. Furthermore, a first reflective layer 12a is formed on the first surface treatment layer 11a. The first surface treatment layer 11a is made of Ni, the second treatment layer 11b has a lower layer made of Ni and an upper layer made of Au or Ag, and the first reflective layer 12a is made of Ag or white paint.
The LED chip 13 has a first electrode pad 131 and a second electrode pad 132. A second reflective layer 12b made of such as Ag or Al is formed on the first electrode pad 131, and a bonding material 130 made of Au—Sn is further formed on the second reflective layer 12b and the second electrode pad 132.
Therefore, the LED chip 13 is mounted on and eutectically bounded to the substrate 10 with the first and second electrode pads 131, 132 of the LED chip 13 coupled to the first and second conductive pads 103a, 103b, respectively, via the bounding material. And the bonding material is 130 bonded to the second surface treatment layer 11b through eutectic bonding, thereby obtaining the semiconductor package 1 with a preferred thermal conductive effect.
However, since the eutectic bonding structure T, i.e., the joint between the bonding material 130 and the second surface treatment layer 11b, has a relatively small thickness of about 3 to 5 um, a large stress can be generated between the LED chip 13 and the substrate 10 due to their CTE (Coefficient of Thermal Expansion) mismatch. Therefore, after the semiconductor package 1 undergoes a reliability test, delamination can easily occur between the LED chip 13 and the substrate 10.
Therefore, there is a need to provide a semiconductor package and a fabrication method thereof so as to overcome the above-described drawbacks.